■ 1991 Founded
■ 1991 MODEM developed for PC.
・SDLC modem
・V.26bis modem
・V.32bis modem for Mac
■ 1993 Video-codec LSI developed
■ 1993 Telephonic LSI developed
■ 1994 POS terminal LSI developed
■ 1994 ISDN-I/F board firIBM-PC/AT with TCP/IP driver
■ 1995 2D graphics Video Processor developed.
■ 1996 LSI design becomes the mainstream of work.
Many are graphics LSIs, and others are contract designs of custom chips (mainly STM
and ATM exchanges) for various communications.
■ 1998 Development of firmware for ATM communication board and device driver for UNIX
■ 1999 Work with the Silicon Valley venture company in the US to enhance the VLIW type DSP
and migrate to a 0.35μm process
■ 2000 Add a floating-point type vector operation mechanism to VLIW type DSP in total of
1G flops or more and complete porting to 0.25 μm process
■ 2001 Began porting work to 0.18 μm process by further strengthening the same DSP (4G flops
or more)
■ 2001 Development of router system equipped with Gigabit EtherNet and 100BASE-T I / F
■ 2001 Started LSI backend design
■ 2002 Mixed signal LSI tester Introduced
■ 2002 Started Analog IP development
VIDEO-DAC, Sound-ADC, Sound-DAC etc
■ 2002 Started 0.18μm 0.15μprocess development
■ 2003 10bit-PipelineADC developed by 0.18um process
■ 2004 1Gbps LVDS transceiver developed by 0.18μm process
■ 2005 Self-developed original 8-bit micro processor for embedded product
Developed analog signal processing LSI for image sensor
■ 2006 Started mass-production of self-developed original embedded micro processor
■ 2007 Development of analog IP (ADC, DAC) started in 0.13um process
Developed Signal Processing LSI for Dense Sensor (Mixed SOC) with Ultra-small Sensor
Developed BaseBand processing LSI for UWB communication
■ 2008 High precision delta-sigma ADC developed
■ 2009 Start mass production of signal processing LSI for magnetic sensor
■ 2011 Development of digital speaker LSI
■ 2012 2Gbps SERDES/PLL developed
■ 2013 Development of digital voltage and current measurement LSI, start mass production
■ 2013 65nm RFCMOS process development start
■ 2014 Improved delta-sigma ADC developed
■ 2015 28nm process development start
■ 2016 40nm process 3.125GHz PLL developed